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NXP Semiconductors /LPC408x_7x /EMC /DYNAMICMRD

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Interpret as DYNAMICMRD

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TMRD0RESERVED

Description

Time for load mode register to active command.

Fields

TMRD

Load mode register to active command time. 0x0 - 0xE = n + 1 clock cycles. The delay is in CCLK cycles. 0xF = 16 clock cycles (POR reset value).
RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data